Semiconductor Compute & Memory

ARM holds ~95% of licensable CPU cores at a 94.6% gross margin — the purest monopoly in coverage. The moat is the ecosystem, not the design: hundreds of billions of dollars of software (Android, iOS, Windows-on-ARM, Linux, compilers) is built on the ARM ISA and its associated core implementations. Switching requires recompiling, revalidating, and often rewriting the entire software stack, coordinated across the whole ecosystem simultaneously. No customer can switch unilaterally, making the lock-in self-reinforcing across every new device generation.

Very high over 5–10 years. The only credible long-term threat is RISC-V — royalty-free but concentrated in embedded/IoT and years from a competitive server or smartphone core at volume. Google's RISC-V work in Android is a multi-year migration risk, but the ecosystem inertia is enormous.

ARM was forced to suspend Huawei licenses in 2019 under US export pressure — a real demonstration that even ISA licensing can be weaponized, and an event that directly accelerated China's domestic RISC-V investment. Rising royalty rates could push hyperscalers toward RISC-V investment; Andes Technology (~15–20% of commercial RISC-V licensing) is the most direct beneficiary of any ARM-disruption scenario, though it remains years from challenging ARM at scale.

ARM controls 95–98% of mobile and embedded ISA licensing at a 94.6% gross margin. The structural barrier is the software ecosystem: hundreds of billions of dollars of application code, operating systems, compilers, and developer toolchains are built on the ARM ISA. Switching ISAs requires coordinating a simultaneous recompile and revalidation across the entire ecosystem — a collective action problem no single customer can solve unilaterally, making the lock-in self-perpetuating across device generations.

Very high. The x86 duopoly (AMD ~40–45% of that market) is durable in PC/server but structurally declining in mobile and edge. RISC-V is the only royalty-free alternative and remains concentrated in embedded/IoT — years from a competitive smartphone or server core at volume. The ISA moat is distinct from the core IP moat: even if a customer designs its own cores, it still licenses the ISA.

The ARM ISA weaponization precedent — the 2019 Huawei license suspension under US export pressure — directly accelerated China's RISC-V investment and demonstrated that even the most entrenched IP position can be disrupted by geopolitical action. This is a distinct threat from the core IP layer: a government-mandated license suspension affects the ISA regardless of which cores are in use, and China's domestic RISC-V ecosystem (Andes, domestic SoC vendors) is the most advanced alternative in development.

TSMC manufactures 85–90% of all sub-7nm wafers — every NVIDIA GPU, Apple SoC, AMD CPU, Qualcomm SoC, and Broadcom ASIC is built there. The moat is cumulative yield learning: acceptable yields at 3nm and below require decades of iterative refinement, proprietary defect databases, and institutional knowledge that cannot be documented or transferred. A leading-edge fab costs $20B+ and takes 3–5 years to build; capital is necessary but not sufficient. TSMC also controls CoWoS advanced packaging, so its actual control of the AI supply chain is broader than foundry share alone implies — it gates AI accelerator output at both the wafer and packaging layers.

Extremely high over 5–7 years; no competitor is within two process generations at volume. Samsung has spent $100B+ and still trails a generation; Intel holds ≤2% external foundry revenue and its 18A node is unproven at scale. The geographic diversification into Arizona, Kumamoto, and Dresden is reducing the Taiwan-concentration discount but will not reach volume parity for years.

The existential risk is a Taiwan Strait conflict halting 85–90% of advanced supply — the explicit motivation behind the CHIPS and EU Chips Acts. The 2021–2022 automotive shortage showed how fast even mature-node constraints cascade; a leading-edge disruption would be an order of magnitude worse. Customer concentration — Apple plus NVIDIA likely representing a large combined share — is a secondary dependency that amplifies any demand-side shock.

NVIDIA controls 80–85% of AI accelerators, and the moat is CUDA — 4M+ developers, every major AI framework optimized for it first, and 6–18 months of uncertain re-optimization imposed on any switcher. Broadcom controls 70–80% of custom hyperscaler ASICs through multi-year co-design relationships requiring deep HBM-integration, advanced-packaging, and SerDes expertise — a 2–3 year design cycle that locks customers in. The two positions are structurally complementary: NVIDIA dominates merchant training silicon; Broadcom dominates custom inference ASICs. Together they gate essentially all AI compute spending.

High for training over 3–5 years; more vulnerable in inference, where workload-specific ASICs can beat general-purpose GPUs on cost-per-inference. Broadcom's position is moderately sustainable but threatened by hyperscalers fully internalizing chip design, which would eliminate the co-design relationship that anchors the moat.

Custom silicon from hyperscalers — Google TPU, Amazon Trainium/Inferentia, Microsoft Maia — represents billions in NVIDIA alternatives already in production. AMD's ROCm is gaining in specific inference workloads. US export controls have repeatedly cut NVIDIA's China-addressable market, and China's DeepSeek now signals the first credible low-cost architectural pressure on incumbent pricing power in AI compute.

Three companies produce essentially all of the world's HBM. Stacking DRAM dies with through-silicon vias at acceptable yield is a manufacturing problem only SK hynix (~50%), Samsung (~30%), and Micron (~20%) have solved. The barrier is not just capital — it is the accumulated yield learning on TSV formation, die-to-die bonding, and thermal management at scale. HBM is effectively sold out on multi-year contracted pricing, with US cloud providers prepaying to lock capacity through 2028, adding a commercial layer to the structural manufacturing barrier.

Very high on the structural barrier — the >$10B-per-fab cost, yield curves, and patent thickets are near-impenetrable. The shift to HBM — effectively sold out with multi-year contracted pricing — provides pricing power absent in prior commodity DRAM cycles. SK hynix leads on HBM3E yield and holds the majority of NVIDIA's allocation, reinforcing its position within the triopoly.

Memory's cyclicality is the standing precedent — SK hynix and Micron both posted negative operating margins in the 2022–2023 downturn, and Japan's Elpida went bankrupt in 2012 and was absorbed by Micron. An HBM capex overshoot could create oversupply; China's CXMT remains generations behind on commodity DRAM but is a long-term structural threat if it floods lower tiers and disrupts the pricing discipline that underpins the triopoly's contracted margins.

DRAM is a tight oligopoly: Samsung (~45–50%), SK hynix (~28–30%), and Micron (~20–23%) control ~90%+ of global supply. DRAM requires cutting-edge process technology, extreme precision in capacitor stack formation, and years of accumulated yield learning; no new DRAM entrant has succeeded in over a decade. The capital barrier exceeds $10B per fab, and the patent thickets surrounding DRAM cell design are near-impenetrable. TrendForce reports Q2 2026 contract DRAM prices up 58–63%, with multi-year supply contracts now anchoring pricing in a way absent from prior cycles.

Very high on the structural barrier. The DRAM oligopoly is more durable than NAND, where six-plus players compete. The unresolved question — whether multi-year contract pricing has broken the historical cycle or merely stretched it — is encoded in the single-digit Consistency scores across the segment (Nanya 3.7, Micron 7.4, SK hynix 8.3). The HBM reallocation of wafer starts away from commodity DRAM is a structural tightening that reinforces pricing power for the Big Three.

Memory's brutal cyclicality is the standing precedent distinct from HBM dynamics — the 2022–2023 downturn saw negative operating margins across the segment, and Elpida's 2012 bankruptcy shows that even large players are not immune. China's CXMT is a long-term structural threat at the commodity DRAM tier, potentially flooding lower-end supply and disrupting the pricing discipline that the oligopoly depends on, even if it cannot challenge HBM or leading-edge DRAM for years.

Broadcom dominates merchant switch silicon at ~60–65% share through decades of ASIC design expertise, deep customer integration, and a portfolio spanning switching, routing, and optical DSPs that no single competitor replicates across all sub-segments. NVIDIA holds ~35–45% of networking ASICs through its InfiniBand and Ethernet platforms, which are co-optimized with its GPU ecosystem. The segment is fragmented across switching, routing, optical, and interconnect sub-markets, but Broadcom's breadth across all of them creates a structural advantage that point-solution competitors cannot match.

Moderate. The segment lacks the monopoly concentration of leading-edge foundry or ARM's ISA, and the proliferation of AI-specific networking requirements (800G Ethernet, PCIe 6.0, CXL) is creating entry points for specialists like Astera Labs (PCIe/CXL retimers, 76.0% gross margin) and Credo (high-speed SerDes PHY, 68.0% gross margin). Broadcom's breadth is its defense; the threat is that AI-specific sub-segments fragment away from the incumbent.

The networking ASIC segment faces a distinct competitive dynamic from the AI accelerator layer: hyperscaler white-box switching (using merchant Broadcom silicon but bypassing Broadcom's system-level integration) is already established, and the emergence of AI-specific interconnect standards (CXL, UCIe) creates new entry points for specialists that did not exist in the prior generation of data-center networking.

Synopsys controls ~55–65% of interface and PHY IP — the silicon-proven, standards-compliant building blocks (DDR, PCIe, USB, HBM controllers) that every complex SoC must license rather than design from scratch. The moat is silicon-proven reliability across process nodes plus deep integration with Synopsys's EDA tools; designing a high-speed PHY in-house carries enormous respin risk that most SoC teams cannot afford. Cadence (10–20%) and Rambus (15–25%) compete but do not displace the leader.

High. The IP is embedded in design flows and validated across foundry processes, creating switching costs that compound with each new process node. The near-duopoly at the high end is reinforced by the integration between PHY IP and EDA tools — a customer switching PHY IP provider must also re-qualify the entire design flow.

Chiplet standardization (UCIe) and open interconnect standards could erode proprietary lock-in over time by commoditizing the interface layer between chiplets. This is the least concentrated of the bottlenecks covered and the one with the clearest path to fragmentation — the UCIe trend is a genuine long-term headwind to Synopsys's pricing power in this specific sub-segment, distinct from its broader EDA dominance.

Two companies control ~65–75% of the mobile application processor market. The barrier is integration: modem, CPU, GPU, NPU, and ISP at performance levels no third party replicates, plus — for Qualcomm — a 4G/5G wireless-essential patent portfolio generating high-margin royalties. Replicating either layer requires billions in R&D and, in Qualcomm's case, a decade of patents. Samsung's Exynos (~5–10%) is the only meaningful third player and is largely captive to Samsung's own devices.

High. The duopoly has proven durable across multiple smartphone generations, and the integration complexity required to compete at the premium tier continues to increase with each new modem generation and on-device AI capability. The moat is reinforced by the wireless-essential patent portfolio, which generates royalties independent of chip sales.

Apple's progressive insourcing of baseband modems is the clearest precedent of a customer dissolving a supplier's position from within — a multi-year process already underway that directly targets Qualcomm's highest-margin customer relationship. Recurring antitrust pressure on Qualcomm's licensing rates is a standing risk to the royalty leg that funds chip R&D, distinct from the competitive dynamics of the SoC market itself.